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Principal Performance Architect M/V/X

Référence 5895472 | Créé le 09 juillet 2026

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  • Lieu : 3001 - Heverlee
  • Temps de travail : Temps plein
  • Type de contrat : Durée indéterminée
  • Famille de métiers : Informatique / Services informatiques

Description de la fonction

What you will do

You will architect software-hardware codesign innovations for next-gen artificial intelligence high-performance computing systems.?

The Compute System Architecture Unit (CSA) at imec is researching next-generation large-scale heterogeneous computer architectures. The team?is responsible for?workload characterization, runtime management innovations, performance?modeling, architecture simulation and prototyping for future applications and the future systems to execute them, to reach multiple orders of magnitude better performance, energy-efficiency, and total-cost-of-ownership.??

We are looking for a Principal AI Performance Architect to technically drive innovation across layers of the computing stack, from application to semiconductor technology innovation and everything in between. You work closely with experts from different fields to?identify?codesign solutions and to build the infrastructure?required?to evaluate them. As an architect, you will drive system?modeling, performance analysis, projections, and strategic innovations against critical product life cycle milestones and program deliverables. This position plays a key role in our mission to shape the future of supercomputer architecture.?

You will:?

  • Research various solutions to enable the next large-scale-high-performance computing clusters. The role spans over various layers from workload characterization, resource management, system architecture, and microarchitecture.?
  • Develop software/hardware performance models at various levels of detail to?identify?performance bottlenecks and propose new solution alleviating the bottlenecks.?
  • Work with multiple teams to capture the relevant characteristics of the use of AI in HPC applications, and to explore the design space for higher accuracy and higher performance of future HPC applications.?
  • Collaborate across the company to guide the direction of HPC HW/SW codesign based on the top HW issues and SW performance limiters generated from the models and characteristics.?
  • Define and scope system and SoC requirements for future architectures.?
  • Model features and configurations that improve performance, power, total cost of ownership and emissions.

Profil

Who you are

  • Master's or PhD degree in Computer Science, Computer?Engineering?or relevant STEM degree, with at least around 8 years of experience.?
  • Experience with performance analysis, engineering, and optimization of HPC applications, such as molecular dynamics and computational fluid dynamics,
  • Experience in AI for HPC is a plus.?
  • Experience with distributed AI/ML applications, such as LLM training and inference.?
  • Experience in?system performance modeling?ranging from a single device (e.g. a GPU) to a machine scale (e.g. a cluster).
  • Good understanding of GPU (preferably XPU) system architectures, distributed programming models, runtime resource management, and microarchitecture.?
  • Strong programming ability in C++ and Python. CUDA knowledge is considered a plus.?
  • Your communication and interpersonal skills enable you to work in a dynamic, distributed team. You actively share experiences and knowledge with colleagues. A history of mentoring more junior engineers and interns is a huge plus.?
  • We are looking for your excellent communication skills in English, as you will work in a multicultural team and together with our partners.?

Compétences linguistiques

  • Anglais (atout)

    • Comprendre : Expérimenté - (C1)
    • Écrire : Expérimenté - (C1)
    • Lire : Expérimenté - (C1)
    • Parler : Expérimenté - (C1)

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Comment postuler ?

Nom de l'employeur
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
Personne de contact
Sandra Kolaric
Mode de présentation
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Website
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